1. Field of the invention
The invention relates to the hermetic packaging of semiconductor devices, and more particularly to compact hermetic packaging suitable for surface mounting semiconductor devices upon a heat sinking substrate.
2. Prior Art
At the present, the packaging of semiconductor devices is the subject of continuing evolution in the direction of achieving increased power densities. An approach presently favored is that of surface mounting the components upon a heat sinking substrate. The active devices generate heat as an incident to their performance of the electronic functions. The heat sinking substrate conducts heat generated in the active devices away from the active devices to a heat exchanger. The cooling path cools the active devices, holding local temperatures within the active devices to values low enough to prevent damage or impair their performance.
In the surface mount approach, one measure of packaging economy, given that the available height between substrates is fixed, is the ratio of package area to the active device area. To illustrate the improvement in packaging economy using an area measure, the very common TO-3 case for an active semiconductor device requires approximately three times the area of a known surface mount package for the same active device. Among surface mount constructions, several examples are known. One known package, for instance, has external area dimensions of 0.625".times.0.450" and exhibits a ratio of package area to chip area of 4.0 to one. Another known surface mount package provides a ratio of package area to chip area of 3.66 to one. The present invention is directed to achieving a lower ratio of package area to chip area, preferably of 2 to 1 or below.